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Microchip Technology /ATSAME70N21 /FPU /MVFR0

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Interpret as MVFR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0A_SIMD_registers 0Single_precision 0Double_precision 0FP_excep_trapping 0Divide0Square_root 0Short_vectors 0FP_rounding_modes

Description

Media and VFP Feature Register 0

Fields

A_SIMD_registers

Indicates the size of the FP register bank
Single_precision

Indicates the hardware support for FP single-precision operations
Double_precision

Indicates the hardware support for FP double-precision operations
FP_excep_trapping

Indicates whether the FP hardware implementation supports exception trapping
Divide

Indicates the hardware support for FP divide operations
Square_root

Indicates the hardware support for FP square root operations
Short_vectors

Indicates the hardware support for FP short vectors
FP_rounding_modes

Indicates the rounding modes supported by the FP floating-point hardware

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data